The continual demand for enhanced integrated circuit performance has resulted in, among other things, a dramatic reduction of semiconductor device geometries, and continual efforts to optimize the performance of structures within a semiconductor device. A number of improvements and innovations in fabrication processes, material composition, and layout of the active circuit levels of semiconductor devices have resulted in very high-density circuit designs. Increasingly, dense circuit design has not only improved a number of performance characteristics, it has also magnified the importance of semiconductor material properties and behaviors.
In the past, most semiconductor devices were fabricated directly on a bulk silicon substrate. Recently, however, semiconductor manufacturers have started to fabricate semiconductor devices on substrates having varied compositions. One variety of substrate that is gaining in acceptance and popularity is silicon-on-insulator (SOI). The insulator configuration of SOI substrates offers semiconductor device designers a number of performance improvements over plain silicon substrates, such as improved leakage currents and improved latch-up characteristics. SOI substrates generally include a relatively thin silicon material disposed over an insulator, such as an oxide, which is, in turn, disposed over a bulk silicon material. SOI substrates are manufactured in a variety of ways. For example, an oxide may be foamed between bulk silicon substrates using conventional wafer bonding and layer transfer techniques and, thereafter, a portion of one of the bulk silicon substrates may be removed, for example, by abrasive planarization, to form a thin silicon film. Removal of the portion of the bulk silicon substrate may be inefficient and expensive due to the quantity of slurry and other consumables, such as polishing pads required for an abrasive planarization process, such as chemical-mechanical planarization (CMP). In addition, conventional planarization procedures may remove an undesirably large amount of the silicon material from the transfer wafer, reducing the number of times the transfer substrate may be used. In addition, an amount of the silicon material transferred from the bulk wafer that ends up in the SOI substrate, which is referred to herein as “transfer yield,” may be relatively low as a result of the need for subsequent removal of a substantial portion of the transferred silicon material.
SOI substrates may also be formed by epitaxial growth of silicon (so-called “epitaxial silicon”) over a dielectric material, such as an oxide. However, epitaxial silicon is susceptible to the occurrence of crystal defects that may degrade the performance of devices fabricated thereon.
Regardless of the method used to produce the SOI substrate, most conventional semiconductor fabrication processes do not encompass the actual production of the SOI substrate. Instead, semiconductor fabrication processes involve forming devices on an already completed SOI substrate that is purchased from a manufacturer. Such completed SOI substrates are generally very expensive and, thus, may be cost prohibitive depending on the semiconductor device being fabricated.
Additionally, as noted above, SOI substrates are susceptible to a number of problems not encountered with bulk silicon substrates. For example, during formation of the SOI substrate, crystal defects may be incorporated into the silicon material, causing charge migration in completed semiconductor devices. Thus, the presence of defects in the silicon material of an SOI substrate may cause a number of performance and reliability problems.